45127BR
VIETNAM – Da Nang, VIETNAM - Ho Chi Minh
Job Description and Requirements
Responsibilities:
Required Qualification:
Key Qualifications
Preferred Qualifications
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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Team lead to develop End2End best-in-class Test and SLM Strategies, Flows and Methodologies incorporating PHYs, Silicon Lifecycle Management IPs, DFx Clients ( Test Compression, LogicBIST, Memory BIST etc. ), Cores, Sub-Systems.- Work with Backend, Functional Verification, Firmware and Software teams to enable comprehensive use cases for SLM IPs ( Path Margin Monitor, PVT, Signal Integrity Monitor etc. )
- Accountable to meet or improve Power, Area, and Performance requirements for the developed reference flows.
- Build automation to drive scalability, debug efficiency.
- Communicate with partners, stakeholders for planning and progress on initiatives using data
- Communicate on the progress of project, red flags, risk, and mitigation plan to Management
- Able to create comprehensive requirement Specification and execution plans.
- Capable of technical deep dives into Platform design solutions and Verification flows
- Generate high quality and Characterization patterns and help in Diagnosis and debug on ATE and In-System testing.
- Leading team members and working with them to improve their productivity.
- Review and study SLM Automation requirements, Specifications and Technical Design documents and prepare comprehensive Plan and develop Reference Flows
- Works with other functional groups to realize solutions.
- Should have good post-silicon DFx bring-up and debug experience.
Required Qualification:
- 10+ years of technical leadership experience as DFx Architect ( Scan ATPG at IP & SOC level) involves in DFx Architecture planning, developed or involved in DFx Flow & Methodologies end2end
- Have experience working on Synopsys Test tool TestMAX or equivalent EDA Test tools, to meet test requirements for Automotive, High-volume manufacturing, Security, Safety, In-ramp, In-Field etc., that includes Memory BIST, LogicBIST, Scan compression, Boundary scan, IEEE1687, IEEE1838, Monitors, Sensors etc.
- Provide sign-off timing and Synthesis constraints for all DFT and SLM Components generated by Synopsys Test and SLM tools for all DFT modes.
- Experience in Python, AWK, SED or Perl based scripting.
- Have good knowledge in Hardware Interfaces, Protocols ( PCIE, USB etc. )
Key Qualifications
- Bachelor of Engineering/Technology in Electronics and Computer Engineering or
- Masters in engineering/Technology in Computer Engineering, Electronics Engineering specialization in DFT or VLSI Design
Preferred Qualifications
- Good knowledge in Monitors/Sensors functional behavior, Security and Physical Design Flows.
- Excellent communication and presentations skills.
- Have published few papers at ITC or written internal application notes etc.
- Self-motivated, must work unaided as well as with teams both locally and with global teams.
- Good technical problem-solving skills.
- Time management, judgment making, planning, and organizing work, summarizing results through technical reports.
- Ability to work in a fast-paced and dynamic environment.
- Good judgment-making capability.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Job Category
Engineering
Country
Viet Nam
Job Subcategory
Solutions Engineering
Hire Type
Employee
DFX Lead | Synopsys
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